1. Field
Embodiments of the present invention relate to a nonvolatile memory device, a nonvolatile memory system, and an operating method for the device and system.
2. Description of the Related Art
Semiconductor memory devices may be generally classified into volatile memory and nonvolatile memory devices. A volatile memory device has generally fast write and read speed, but it loses data stored therein when the power supply to the memory device is interrupted. A nonvolatile memory device may have relatively slower write and read speed, but retains stored data even when the power supply to the memory device is interrupted. Hence, a nonvolatile memory device may be employed to store data regardless of whether the power supply to the memory device may be interrupted or not. Examples of nonvolatile memory devices include read only memory (ROM), mask ROM (MROM), programmable ROM (PROM), erasable programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), flash memory, phase change random access memory (PRAM), magnetic RAM (MRAM), resistive RAM (RRAM), and ferroelectric RAM (FRAM) devices. Flash memory devices are widely used and may be classified into NOR or NAND type depending upon the type of gate logic employed
Access operations of a nonvolatile memory device may include a program operation, a read operation, and an erase operation. A program operation may, for example, store data in the memory cells, a read operation may read data stored in memory cells, and an erase operation may erase data stored in a memory cell. Generally, program, read and/or erase operations, may be performed using various level operating voltages. Typically, a nonvolatile memory device may include a voltage generation circuit for generating such operating voltages.
Typically, a voltage generation circuit may be controlled so that it may become activated only when the nonvolatile memory device performs an access operation.
FIG. 1 is a diagram illustrating a program operation of a conventional nonvolatile memory device.
Referring to FIG. 1, when a program command PGM is received by the nonvolatile memory device from an external source, the nonvolatile memory device first activates a voltage generation circuit (PUMP_EN). When activation of the voltage generation circuit is completed (T1), the voltage generation circuit generates one or more program voltages for a program operation. Next, the nonvolatile memory device performs an operation for programming nonvolatile memory cells using a program voltage (PROGRAM). An operation for programming a nonvolatile memory cell may include an operation for applying a program pulse to a program target cell. When a program is completed (T2), the nonvolatile memory device deactivates the voltage generation circuit and places it in a disabled or de-activated state (PUMP_DIS).
It is noted, that a conventional nonvolatile memory device may only sequentially perform the aforementioned operations, i.e. activating a voltage generation circuit, programming one or more memory cells, and deactivating the voltage generation circuit, without allowing intervention of any other operation in response to a program command PGM.
Hence, a conventional nonvolatile memory device is not suitable for receiving data and addresses until a voltage generation circuit is deactivated in response to a program command PGM. Accordingly, a conventional non-volatile memory device requires that addresses for selecting nonvolatile memory cells to be programmed and/or data to be stored in the memory cells need to be received by the memory device before a program command PGM is received (T0).
As a result, the operation of a conventional nonvolatile memory device may be inefficient.